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Intel Architecture processors that implement the MMX technology. FCOMI/FCOMIP/FUCOMI/FUCOMIP—Floating-point compare and set condition-code.FCOMI, Compare Floating Point Values and Set EFLAGS FXSAVE, Save x87 FPU, MMX Technology, and SSE State UD, Undefined Instruction. AMD64 Technology. 26569—Rev. 3.15—May 2018. December 2004. 3.05. Added FISTTP instruction (SSE3). Updated CPUID information in exception tables. instruction set; and describes the processor's floating-point exception conditions. Chapter 8 — Programming with Intel MMX™ Technology. Oracle Technology Network 3. Instruction Set Mapping fcomi, Comparison Instructions (Floating-Point). fcomip, Comparison Instructions Newer IA-32 processors also include the FCOMI instruction, which performs the Because the FPU shares its resources with the newer MMX technology, FCOMI-type instructions, which normally store their results to integer status flag If an FCMOV-type instruction is detected following an FCOMI-type FCOMI/FCOMIP/FUCOMI/FUCOMIP, Compare Floating Point Values and Set EFLAGS FXRSTOR, Restore x87 FPU, MMX Technology, SSE, and SSE2 State. According to the IA-32 Manual Volume 2, it reads: "FCOMI/FCOMIP/ FUCOMI/FUCOMIP—Compare Floating Point Values and Set EFLAGS". And, after you said this, Instruction Set Reference A-M, Order Number 253666; Instruction Set Hyper-Threading Technology requires a computer system with an Intel® Pentium® 4

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